Dynamic shift register for staggered printing head

ABSTRACT

A system for applying groups of data bits to an electrostatic writing head having two staggered lines of electrodes in which odd bits of a group are serially fed directly to the electrodes of one line and in which even bits of a group are fed to the electrodes of the other line through a dynamic shift register having a number of places equal to n where n is the number of bits in a group and in which means is provided for recirculating the bits through the shift register in response to a wait signal.

United States Patent Frohbach [45] Mar. 19, 1974 DYNAMIC SHIFT REGISTERFOR 3.023.731 3/l962 Schwertz 1. 34617-8 ES STAGGERED PRINTING HEAD3.071046 l/l963 Shull I 3,503 O63 3/1970 Starr 340/324 AD lnvenwri HughFrohbflsh, Sunnyvale. lif. 3.624.661 11/1971 Shebanon et al 346/74 ES{73} Assignee: The Rapifax Company, New York. P E P H H rrmary xammerauenon I Assistant ExaminerPaul R. Woods [22] Flled? 1972 Attorney. Agent,or Firm-Shenier & O'Connor [21] Appl. No.: 311,490

[57] ABSTRACT [52] us CL I I I I I I 340/1715 346/74 ES A system forapplying groups of data bits to an elec- [51] Int Cl b 15/00 trostaticwriting head having two staggered lines of 8 5 324 electrodes in whichodd bits of a group are serially fed DIG directly to the electrodes ofone line and in which even bits of a group are fed to the electrodes ofthe [56] References Cited other line through a dynamic shift registerhaving a number of places equal to n where n is the number of UNITEDSTATES PATENTS bits in a group and in which means is provided for re-2-95m2l 8/l960 Conrad 346/74 55 circulating the bits through the shiftregister in re 2,898 468 8/1959 McNaney 1 1 .1 346/74 ES sponge to await signal 2.930.847 3/1960 Metzger 1 4 4 .1 346/74 ES I 2.955.89410/1960 Epstein 346/74 ES 12 Claims, 1 Drawing Figure EVGN Pm SELECTORODD PIN SELEC TOR IO IIT DYNA MIC SHIFT RGGISTER DYNAMIC SHIFT REGISTERFOR STAGGERED PRINTING HEAD BACKGROUND OF THE INVENTION There are knownin the prior art electrostatic printing systems in which bits ofinformation are fed to electrodes on a printing head. In response to thebits the printing head produces lines or rows of dots on the recordmedium. In order to achieve good reproduction, it is important that thedots be relatively dense. For example, good reproduction results whentwo hundred dots per inch are produced on a given line. However, thedensity of electrodes which can be provided on the recording head islimited by electrical breakdown between adjacent electrodes of styli. Asa practical matter, if the electrodes have a diameter of five mils, onlyabout one hundred electrodes per inch can be provided on the recordinghead if electrical breakdown is to be avoided.

In order to solve the problem outlined above, it has been suggested inthe prior art that a recording head be provided with two staggered rowsof styli or electrodes. To obtain the equivalent of two hundred dots perinch on the recording medium two rows of one hundred styli per inch eachare employed. The rows are staggered five mils with respect to eachother so that the styli of each row traverse different areas of thepaper. Moreover, the rows are spaced ten mils apart.

It will readily be appreciated that in use of the head described aboveto produce a record having the equivalent of two hundred dots per inchsome information must be stored. Where the data source puts outinformation sequentially in the order of P1, P2, P3, P4 Pn, Pl, PZ, P'3,P'4 Pn, P"l, P"2, P"3, P"4 P"n and a pair of "/2 step commutators existfor applying bits to the electrodes of the groups, respectively, it isapparent than an n bit delay is necessary for every other bit of a groupsuch, for example, as the even bits since the odd bits may be printed atonce. Stated otherwise, two lines of even bits must be stored if thesystem is to operate to produce the equivalent of 200 dots per inch on agiven line.

In addition to the problem outlined above of storage of at least twolines of even bits, the source of information may stop putting out dataat any element and wait. That is, it may put out a series of zeros whichare not to be printed. This occurs for precisely mn element periodswhere m is an integer. It is indicated by the data source on a differentchannel from the channel which carries the output data.

From the foregoing it is clear that in use of a staggered printing headsome form of storage device must be provided and that device must becapable of retaining the information for a relatively indefinite periodof time. While a static shift register which has the capability ofstoring information for an indefinite period of time is capable ofachieving the desired result, it is a relatively expensive piece ofequipment.

I have invented a system incorporating a dynamic shift register whichsolves the problems outlined above. My system provides a relativelyinexpensive arrangement utilizing a staggered printing head. My systemis capable of retaining information during a wait" period without theuse of a static shift register. My arrangement produces the equivalentof a two hundred dot per inch line in a relatively simple andexpeditious manner.

SUMMARY OF THE INVENTION One object of my invention is to a provide adynamic shift register for a staggered printing head.

Another object of my invention is to provide an electrostatic printingsystem employing a staggered printing head which system is relativelyinexpensive.

A further object of my invention is to provide the equivalent of a twohundred dot per inch printed line in a simple and expeditious manner.

Other and further objects of my invention will appear from the followingdescription.

In general, my invention contemplates the provision of a system forapplying groups of data bits to an electrostatic writing head having twostaggered lines of electrodes or styli in which the odd bits of a groupfrom a data source are serially fed directly to the electrodes of oneline and in which even bits of a group are fed to the electrodes orstyli of the other line through a dynamic shift register having a numberof places n equal to the number of bits in a group and in which means isprovided for recirculating the stored bits through the shift register inresponse to a wait signal provided by the data source on a separateline.

BRIEF DESCRIPTION OF THE DRAWINGS In the accompanying drawing to whichreference is made in the instant specification, the FIGURE is aschematic view of my dynamic shift register for staggered printing head.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawing, arecord medium 10 is adapted to be printed with lines of dots to make upthe information coming from the input source to be describedhereinbelow. The writing head includes two spaced lines or rows of stylior electrodes 12 and 14 the electrodes 12 of which can be consideredeven electrodes and the electrodes 14 of which can be considered to beodd electrodes. In a specific embodiment the electrodes of a row may bespaced by a distance of about 10 mils and the distance between the tworows is about l0 mils. By way of illustration only, we have shown fiveelectrodes in each of the two lines whereas in a practical embodimentthere will be one hundred electrodes or styli in each line and eachgroup of information bits contains 200 bits. In a manner to bedescribed, the record medium 10 is adapted to be stepped relative to thehead having electrodes 12 and 14 through a distance corresponding to thedistance between successive lines to be printed on the record medium inthe direction of the arrow A in the drawing to bring lines of the recordmedium successively into registry with the row of electrodes 14 and therow of electrodes 12. In the particular example being considered eachstep is five mils.

An even pin selector 16 such as an n12 commutator is adapted to beindexed in response to a signal applied to an indexing section 18successively to apply bits to the electrodes of the line of electrodes12. Similarly, an odd pin selector 20 or commutator is adapted to bestepped in response to a signal at an indexing section 22 successivelyto apply bits to the electrodes of the row of electrodes 14.

The data source 24 of any suitable type known to the art is adapted toput out information bits on line 28 and synchronizing pulses on a line26 at a rate of about 1,000 pulses per second. The data source alsoincludes a section 42 which carries a normal" signal so long as the datasource 24 is putting out information. When no information is being putout by the source 24 the signal from section 42 is not present.

A divide-by-two network 30 is adapted to receive the synchronizingpulses from line 26 and to put out a pulse every second synchronizingpulse. 1 apply the output of network 30 directly to the indexing section22 of the selector 20 to step the selector 20 on every odd synchronizingpulse. A two-input AND circuit 32 receives the input data from line 28and the output of circuit 30 to apply every odd bit of information fromthe data source to the selector 20. In this way, odd bits are directlysequentially applied to the electrodes or styli 14 by the odd pinselector or commutator 20.

I also apply the output of the circuit 30 to the inhibiting terminal 64of an amplifier 62 to provide an input for the indexing section 18 ofthe even pin selector 16 on every even synchronizing pulse. 1 furtherapply the output of the circuit 30 to an inhibiting input terminal 38 ofa two-input AND circuit 36 and the other input of which is supplied byline 28. Thus, every even bit of information is passed by the circuit 36to one input terminal of a two-input AND circuit 44. 1 apply the outputfrom the section 42 data source to the other input terminal of ANDcircuit 44. Thus, every even bit of information is passed to the inputof a bit dynamic shift register 40, so long as the normal signal existsat the output of section 42.

Data source section 42 and network 30 provide the inputs for a two-inputAND circuit 56 which provides a shifting signal to the shift section 58of the register 40 so long as the normal signal exists. In this manner,the even bits of each group are applied to the register 40 and after 10even bits have passed into the register 40, all of the places in theregister are full. With the arrangement shown in which there are 10styli or electrodes 12 and 14, register 40 is full after two lines ofbits have been produced by the source 24. On the occurrence of the nextshift pulse, the first bit which moved into the register moves out ofthe register to one input terminal ofa two-input AND circuit 52, theother input of which is supplied by the data source section 42. Fromthis point onward, the circuit 52 passes the even bits to a line 54leading to the even pin selector 16.

While for the particular example we have illustrated there are only tenprinting electrodes, in apractical embodiment of the systeml'T00electrodes are used for pages of 8% inch width.

tion which must be retained if the system is to function properly.

I connect the output from section 42 to the inhibiting terminal 48 of atwo-input AND circuit 46 the other input of which is provided by theoutput from the shift register 40. Similarly, I apply the output fromsource section 42 to an inhibiting input terminal of a two-input ANDcircuit 60 the other input of which is provided by the clock pulse line26. Thus, when no signal exists on the output from data source section42 AND circuit 46 couples the output from shift register 40 to the inputthereto. At the same time, AND circuit 60 provides shift pulses forstepping the shift register 40 to preserve the data contained therein.Since the wait" signal or absence of a normal" from the section 42exists for a period which is an integral multiple of the time occupiedby a group of bits, when the wait period is over, the shift register 40contains the same information in the same order when the wait periodbegan. When the normal signal from network 42 resumes, the systemcontinues to function as before.

The operation of my dynamic shift register for a staggered printing headcan best be understood from the following table considering a pluralityof groups of pulses P, P, P", P', of 10 pulses each from the beginningof the operation of the system. Considering the relative orientation ofthe record medium 10, and the electrodes 12 and 14 being such that therow of styli 14 are aligned with line 1, odd pulses of the first groupof pulses P, are passed directly by AND circuit 32 to the odd pinselector 20 and, in response to the indexing signal at input 22, theyare applied sequentially to the electrodes 14. Even pulses of the groupP are passed by AND circuits 36 and 44 to the shift register 40 to fillup five places thereof.

At the end of the first group of pulses P, the head and record mediumare stepped relative to each other through a distance equal to thedistance between successive lines to be printed which is half thedistance between the rows of electrodes 12 and 14 so that the styli 14are aligned with line 2. During the next group of pulses P, the oddpulses are again applied directly to the electrodes of the line 14 andthe even pulses of the group are fed into shift register 40 to fill theregister. The head and record medium are again stepped relative to eachother so that the line of electrodes 14 is aligned with line 3. At thesame time, the row of electrodes 12 is aligned with line 1. It will beremembered that this time the register 40 is full. Consequently, duringthe period occupied by this group of pulses P", the odd pulses are feddirectly to the odd pins 14 as before. However, the even pulses of thefirst group which had been stored by the register 40 are now fed to theeven electrodes of styli 12. That is to say, pulses P2, P4, P6, P8 and P10 are fed to the respective styli 12 during this period of operation.it will readily be seen that the result is a complete line ofinformation for line 1. In the course of the next group of pulses P',the odd pulses are fed directly to the styli 14 to print the oddinformation in the 4 while the pulses P'2, P'4, P'6, P8 and PM are fedto the even styli 12 to complete the line 2 of information.

The operation of my system for slightly more than the first three linesof information can best be seen from the following table:

74, the output of which is applied to the enabling input of AND circuit60. During a "wait" period of 10 clock Shift register sync infoConsidering the operation described above, if a "wait" period occurs,the output from section 42 disappears at the end of a group of pulsesand does not reappear for an interval of time which is an integralmultiple of the time occupied by a group of pulses. During this wait"period, both the AND circuits 46 and 60 are enabled so that theinformation contained in register 40 is not lost but is recirculated. Atthe end of the period of time, the information in register 40 will be asit was at the beginning of the period. Thus, when operation continuesthe even information stored therein will be fed to the even styli tocomplete the lines of information which were left incomplete when the"wait" period started.

While the spacing between the two staggered rows of styli is at leasttwo lines, it will be understood that the row spacing may be increasedto three or more lines as desired. In such event, the capacity of theshift register should be correspondingly increased. For example,register 40 should have a bit capacity for a row spacing of three lines.Furthermore during any "wait" period, where ten clock pulses or anintegral multiple thereof are provided on line 26, register 40 must beshifted fifteen times or some integral multiple thereof.

This is accomplished by actuating switch 70 to its alternate positionwhere clock pulses on line 26 are applied to a frequency multiplier 72tuned to the third harmonic of the lock pulse frequency. If desired theoutput of frequency tripler 72 may be directly connected to the enablinginput of AND circuit 60. Thus during a wait" period of ten clock pulses,register 40 would be indexed thirty times; and its entire contents wouldbe recirculated twice. Preferably, however, frequency tripler 72 iscoupled to a divide-by-two flip-flop pulses, register 40 will be indexed15 times; and its entire contents will be recirculated once.

it will be appreciated that a dynamic shift register is of simpler andless expensive construction than a static shift register. However, adynamic shift register can not retain stored data indefinitely as can astatic shift register. Yet, I may effectively achieve an indefinitestorage period for a dynamic shift register by continually indexing theregister at a minimum rate the period of which is somewhat less than thestatic storage period of the dynamic shift register. For example, if theclock rate on line 26 is 5,000 pulses per second and the informationrate on line 28 is correspondingly 5,000 bits per sec ond, register 40will be indexed at a minimum rate of 2,500 times per second by flip-flop30 through AND circuit 56. Accordingly the static storage period ofdynamic register 40 must be at least 0.4 millisecond and is preferablynot less than 0.6 to 0.8 millisecond. During a wait period, register 40will be indexed 5,000 times per second for a two-line row spacing withswitch in the position shown and 7,500 times per second for a three'linerow spacing with switch 70 in the alternate position.

It will be seen that l have accomplished the objects of my invention. 1have provided a dynamic shift register for a staggered printing head. Mysystem enables me to use a staggered electro printing head in a systemwhich is relatively inexpensive. My arrangement enables me to storeinformation during periods when no information is being supplied by thedata source. It is simple and relatively inexpensive to construct forthe result achieved thereby.

It will be understood that certain features and subcombinations are ofutility and may be employed without reference to other features andsubcombinations. This is contemplated by and is within the scope of myclaims. It is further obvious that various changes may be made indetails within the scope of my claims without departing from the spiritof my invention. It is, therefore, to be understood that my invention isnot to be limited to the specific details shown and described.

Having thus described my invention, what I claim is:

1. Printing apparatus including in combination a data source providinginformation in the form of data bit groups each representing a portionof a line to be printed, a printing head having two staggered rows ofelectrodes, means for applying alternate bits of each group to theelectrodes of one row, and means including a dynamic shift register forapplying the other bits of each group to the electrodes of the otherrow.

2. Apparatus as in claim 1 in which said register has a capacity equalto K times half the number of bits in a group, where K is an integer notless than two.

3. Apparatus as in claim 1 further including means for selectivelyrecirculating the contents of said register.

4. Apparatus as in claim 1 further including means for selectivelyrecirculating the entire contents of the register an integral number oftimes.

5. Apparatus as in claim 1 wherein the rows are spaced by two printinglines and wherein the register has a capacity equal to the number ofbits in a group.

6. Apparatus as in claim 1 wherein the rows are spaced by three printinglines and wherein the register has a capacity equal to three-halves thenumber of bits in a group.

7. Apparatus as in claim 1 wherein the data source provides informationat a certain bit rate, the apparatus further including means forindexing the shift register at half said rate.

8. Apparatus as in claim 1 further including means for normally indexingthe shift register at a predetermined rate and means for selectivelyindexing the shift register at K times said rate, where K is an integernot less than two.

9. Apparatus as in claim 8 wherein the rows are spaced by two printinglines and wherein K equals two.

10. Apparatus as in claim 8 wherein the rows are spaced by threeprinting lines and wherein K equals three.

11. Printing apparatus including in combination a data source providingdata bits representing a portion of a line to be printed, a printinghead having a row of electrodes, a dynamic shift register having acertain static storage time, means selectively coupling the source tothe register, means selectively coupling the register to the electrodes,means selectively recirculating the contents of the register, and meanscontinually indexing the shift register at rates greater than thereciprocal of its static storage time.

12. Apparatus as in claim 11 wherein the data source includes meansproviding a signal of predetermined duration and wherein therecirculating means includes means responsive to said signal forrecirculating the entire contents of the register an integral number of

1. Printing apparatus including in combination a data source providinginformation in the form of data bit groups each representing a portionof a line to be printed, a printing head having two staggered rows ofelectrodes, means for applying alternate bits of each group to theelectrodes of one row, and means including a dynamic shift register forapplying the other bits of each group to the electrodes of the otherrow.
 2. Apparatus as in claim 1 in which said register has a capacityequal to K times half the number of bits in a group, where K is aninteger not less than two.
 3. Apparatus as in claim 1 further includingmeans for selectively recirculating the contents of said register. 4.Apparatus as in claim 1 further including means for selectivelyrecirculating the entire contents of the register an integral number oftimes.
 5. Apparatus as in claim 1 wherein the rows are spaced by twoprinting lines and wherein the register has a capacity equal to thenumber of bits in a group.
 6. Apparatus as in claim 1 wherein the rowsare spaced by three printing lines and wHerein the register has acapacity equal to three-halves the number of bits in a group. 7.Apparatus as in claim 1 wherein the data source provides information ata certain bit rate, the apparatus further including means for indexingthe shift register at half said rate.
 8. Apparatus as in claim 1 furtherincluding means for normally indexing the shift register at apredetermined rate and means for selectively indexing the shift registerat K times said rate, where K is an integer not less than two. 9.Apparatus as in claim 8 wherein the rows are spaced by two printinglines and wherein K equals two.
 10. Apparatus as in claim 8 wherein therows are spaced by three printing lines and wherein K equals three. 11.Printing apparatus including in combination a data source providing databits representing a portion of a line to be printed, a printing headhaving a row of electrodes, a dynamic shift register having a certainstatic storage time, means selectively coupling the source to theregister, means selectively coupling the register to the electrodes,means selectively recirculating the contents of the register, and meanscontinually indexing the shift register at rates greater than thereciprocal of its static storage time.
 12. Apparatus as in claim 11wherein the data source includes means providing a signal ofpredetermined duration and wherein the recirculating means includesmeans responsive to said signal for recirculating the entire contents ofthe register an integral number of times.